CompactPCI Express

Introduction PCI Express

In general there is a move from parallel busses to serial busses, especially with Ethernet and USB. Serial busses support hot-swap better, and provide a higher scalability in processor-to-processor and system-to-system system architectures. Moreover, it uses less hardware estate and less connector size.

The definition of PCI Express is a scalable full-simplex serial bus standard that operates at 2.5 Gbps and offers both asynchronous and isochronous data transfers (where isochronous deals with data associated with time-sensitive applications, such as audio or video applications).

One can look at PCI Express as being the transformation of the parallel PCI bus to a serial, packet based bus. PCI Express is targeted for chip-to-chip, board-to-board, and box-to-box connections, and is developed under the control of PCI-SIG – Special Interest Group. Being backwards compatible, concerning the software it allows the application and driver developer to use the same software tools used to develop PCI-based software. This provides PCI Express with a unique feature: it does not need a protocol conversion while acting both as host bus and as expansion bus. This gives it an unmatched level of performance scalability.

CompactPCI Overview

CompactPCI Express is a PICMG standard with the base standard called PICMG EXP.0, which was released in 2005. The move from CompactPCI to CompactPCI Express includes the influence from the Telecom Equipment Manufacturers with high availability architectures up to 99.999%, which need additional items like hot swap and system management.  

Base features of CompactPCI, such as user I/O pins, rear transition I/O modules, support for additional busses like Computer Telephony, and base mechanicals remain in the CompactPCI Express standard. In practice this means for a 6U CompactPCI Express module the J3-J5 mechanical attributes are the same as the base CompactPCI standard.

The difference lies in the J1 and J2 connectors of CompactPCI, which are replaced with improved connectors. The power supply is via a 7-pin Universal Power Module, UPM, capable of delivering over 400W of power to individual modules. The high speed PCI Express interconnect is achieved with a 3-row Advanced Differential Fabric connector. Two of these connectors are used, providing up to 120 Gbps bandwidth to the backplane.

A mini, enriched 2 mm hard metric connector functions in several capacities depending on the slot in which it is used. It is a keyed connector that can provide rear I/O for 3U modules, provide power to low-power modules (<34W), PXI trigger signals, or geographical addressing.

To leverage the wide array of available 3U and 6U CompactPCI modules, hybrid designs of CompactPCI / CompactPCI Express backplanes are becoming available. With these, a smoother transition is possible.

The complete specification can be obtained from PICMG Europe by using our order form.